On Tue, Mar 25, 2025 at 11:18:45AM -0600, Rodrigo Siqueira wrote: > +.. kernel-figure:: pipe_and_queue_abstraction.svg > + > +In the central part of this figure, you can see two elements, one called Did you mean hardware block? > +**Pipe** and another named **Queues**; it is important to highlight that > Queues > +must be associated with a Pipe and vice-versa. Every specific hardware may > have > +a different number of Pipes and, in turn, a different number of Queues; for > +example, GFX 11 has two Pipes and two Queues per Pipe. > + > +Pipe is the hardware that processes the instructions available in the Queues; > +in other words, it is a thread executing the operations inserted in the > Queue. > +One crucial characteristic of Pipes is that they can only execute one Queue > at > +a time; no matter if the hardware has multiple Queues in the Pipe, it only > runs > +one Queue per Pipe. When a queue is running in the Pipe, it is said that the > +Queue is **Active**. > + > +Pipes have the mechanics of swapping between queues at the hardware level. > +Nonetheless, they only make use of Queues that are considered mapped. Pipes > can > +switch between queues based on any of the following inputs: > + > +1. Command Stream; > +2. Packet by Packet; > +3. Other hardware requests the change (e.g., MES). > + > +Queues within Pipes are defined by the Hardware Queue Descriptors (HQD). > +Associated with the HQD concept, we have the Memory Queue Descriptor (MQD), Related to HQD, we have MQD? > +which is responsible for storing information about the state of each of the > +available Queues in the memory. The state of a Queue contains information > such > +as the GPU virtual address of the queue itself, save areas, doorbell, etc. > The > +MQD also stores the HQD registers, which are vital for activating or > +deactivating a given Queue. > +
Thanks. -- An old man doll... just what I always wanted! - Clara
signature.asc
Description: PGP signature
