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On Thu, Mar 20, 2025 at 12:22 PM Alex Deucher <alexander.deuc...@amd.com> wrote:
>
> GC12 only has 1 mec.
>
> Fixes: 52cb80c12e8a ("drm/amdgpu: Add gfx v12_0 ip block support (v6)")
> Signed-off-by: Alex Deucher <alexander.deuc...@amd.com>
> ---
> drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c
> b/drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c
> index f4ef81ce36701..ae41c91c9f6a2 100644
> --- a/drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c
> +++ b/drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c
> @@ -1398,7 +1398,7 @@ static int gfx_v12_0_sw_init(struct amdgpu_ip_block
> *ip_block)
> adev->gfx.me.num_me = 1;
> adev->gfx.me.num_pipe_per_me = 1;
> adev->gfx.me.num_queue_per_pipe = 1;
> - adev->gfx.mec.num_mec = 2;
> + adev->gfx.mec.num_mec = 1;
> adev->gfx.mec.num_pipe_per_mec = 2;
> adev->gfx.mec.num_queue_per_pipe = 4;
> #ifdef CONFIG_DRM_AMDGPU_NAVI3X_USERQ
> --
> 2.49.0
>
