RE: [PATCH] drm/amdgpu: Set PG state to gating for vcn_v_5_0_1

[Zhang, Hawking]

[AMD Official Use Only - AMD Internal Distribution Only]

Reviewed-by: Hawking Zhang <hawking.zh...@amd.com>

Regards,
Hawking
-----Original Message-----
From: Kamal, Asad <asad.ka...@amd.com>
Sent: Thursday, February 27, 2025 21:19
To: amd-gfx@lists.freedesktop.org; Lazar, Lijo <lijo.la...@amd.com>
Cc: Zhang, Hawking <hawking.zh...@amd.com>; Ma, Le <le...@amd.com>; Zhang, 
Morris <shiwu.zh...@amd.com>; Kamal, Asad <asad.ka...@amd.com>; Deucher, 
Alexander <alexander.deuc...@amd.com>
Subject: [PATCH] drm/amdgpu: Set PG state to gating for vcn_v_5_0_1

For vcn_v_5_0_1, set power state to gating during hw fini. Also there may be 
scenario where VCN engine hangs during a job execution, then it's not safe to 
assume that set_pg_state works fine during hw_fini to put the state to gated. 
After a reset, we can assume that it's in the default state, therefore reset 
the driver maintained state. Put the default state as gated during reset as per 
this assumption.

Signed-off-by: Asad Kamal <asad.ka...@amd.com>
Suggested-by: Lijo Lazar <lijo.la...@amd.com>
Reviewed-by: Lijo Lazar <lijo.la...@amd.com>
---
 drivers/gpu/drm/amd/amdgpu/vcn_v5_0_1.c | 12 +++++++++++-
 1 file changed, 11 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/vcn_v5_0_1.c 
b/drivers/gpu/drm/amd/amdgpu/vcn_v5_0_1.c
index 900702b1a3bb..0273157c2bfd 100644
--- a/drivers/gpu/drm/amd/amdgpu/vcn_v5_0_1.c
+++ b/drivers/gpu/drm/amd/amdgpu/vcn_v5_0_1.c
@@ -224,8 +224,13 @@ static int vcn_v5_0_1_hw_fini(struct amdgpu_ip_block 
*ip_block)
        struct amdgpu_device *adev = ip_block->adev;
        int i;

-       for (i = 0; i < adev->vcn.num_vcn_inst; ++i)
+       for (i = 0; i < adev->vcn.num_vcn_inst; ++i) {
+               struct amdgpu_vcn_inst *vinst = &adev->vcn.inst[i];
+
                cancel_delayed_work_sync(&adev->vcn.inst[i].idle_work);
+               if (vinst->cur_state != AMD_PG_STATE_GATE)
+                       vinst->set_pg_state(vinst, AMD_PG_STATE_GATE);
+       }

        return 0;
 }
@@ -268,6 +273,11 @@ static int vcn_v5_0_1_resume(struct amdgpu_ip_block 
*ip_block)
        int r, i;

        for (i = 0; i < adev->vcn.num_vcn_inst; i++) {
+               struct amdgpu_vcn_inst *vinst = &adev->vcn.inst[i];
+
+               if (amdgpu_in_reset(adev))
+                       vinst->cur_state = AMD_PG_STATE_GATE;
+
                r = amdgpu_vcn_resume(ip_block->adev, i);
                if (r)
                        return r;
--
2.46.0