On 2/6/2025 3:11 PM, Emily Deng wrote:
> In sriov multiple vf, Set CP_HQD_PQ_DOORBELL_CONTROL.DOORBELL_MODE to 1 to
> read WPTR from MQD.
>
> v2: Add amdgpu_sriov_multi_vf_mode
> Signed-off-by: Emily Deng <emily.d...@amd.com>
> ---
> drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c | 2 +-
> drivers/gpu/drm/amd/amdgpu/amdgpu_virt.h | 2 ++
> drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3.c | 2 +-
> .../gpu/drm/amd/amdkfd/kfd_mqd_manager_v9.c | 23 +++++++++++++++++--
> drivers/gpu/drm/amd/pm/amdgpu_pm.c | 4 ++--
> drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c | 8 +++----
> 6 files changed, 31 insertions(+), 10 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c
> b/drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c
> index 49ca8c814455..a1450f13d963 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c
> @@ -1990,7 +1990,7 @@ static int amdgpu_debugfs_sclk_set(void *data, u64 val)
> uint32_t max_freq, min_freq;
> struct amdgpu_device *adev = (struct amdgpu_device *)data;
>
> - if (amdgpu_sriov_vf(adev) && !amdgpu_sriov_is_pp_one_vf(adev))
> + if (amdgpu_sriov_multi_vf_mode(adev))
> return -EINVAL;
>
> ret = pm_runtime_get_sync(adev_to_drm(adev)->dev);
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_virt.h
> b/drivers/gpu/drm/amd/amdgpu/amdgpu_virt.h
> index 5381b8d596e6..b28082084b3a 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_virt.h
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_virt.h
> @@ -352,6 +352,8 @@ static inline bool is_virtual_machine(void)
>
> #define amdgpu_sriov_is_pp_one_vf(adev) \
> ((adev)->virt.gim_feature & AMDGIM_FEATURE_PP_ONE_VF)
> +#define amdgpu_sriov_multi_vf_mode(adev) \
> + (amdgpu_sriov_vf(adev) && !amdgpu_sriov_is_pp_one_vf(adev))
> #define amdgpu_sriov_is_debug(adev) \
> ((!amdgpu_in_reset(adev)) && adev->virt.tdr_debug)
> #define amdgpu_sriov_is_normal(adev) \
> diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3.c
> b/drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3.c
> index 2ba185875baa..42251f2b9741 100644
> --- a/drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3.c
> +++ b/drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3.c
> @@ -1857,7 +1857,7 @@ static int gfx_v9_4_3_xcc_mqd_init(struct amdgpu_ring
> *ring, int xcc_id)
> DOORBELL_SOURCE, 0);
> tmp = REG_SET_FIELD(tmp, CP_HQD_PQ_DOORBELL_CONTROL,
> DOORBELL_HIT, 0);
> - if (amdgpu_sriov_vf(adev))
> + if (amdgpu_sriov_multi_vf_mode(adev))
> tmp = REG_SET_FIELD(tmp, CP_HQD_PQ_DOORBELL_CONTROL,
> DOORBELL_MODE, 1);
> } else {
> diff --git a/drivers/gpu/drm/amd/amdkfd/kfd_mqd_manager_v9.c
> b/drivers/gpu/drm/amd/amdkfd/kfd_mqd_manager_v9.c
> index ff417d5361c4..9e08bcfa37d3 100644
> --- a/drivers/gpu/drm/amd/amdkfd/kfd_mqd_manager_v9.c
> +++ b/drivers/gpu/drm/amd/amdkfd/kfd_mqd_manager_v9.c
> @@ -551,7 +551,7 @@ static void init_mqd_hiq_v9_4_3(struct mqd_manager *mm,
> void **mqd,
> m->cp_hqd_pq_control |= CP_HQD_PQ_CONTROL__NO_UPDATE_RPTR_MASK |
> 1 <<
> CP_HQD_PQ_CONTROL__PRIV_STATE__SHIFT |
> 1 <<
> CP_HQD_PQ_CONTROL__KMD_QUEUE__SHIFT;
> - if (amdgpu_sriov_vf(mm->dev->adev))
> + if (amdgpu_sriov_multi_vf_mode(mm->dev->adev))
> m->cp_hqd_pq_doorbell_control |= 1 <<
>
> CP_HQD_PQ_DOORBELL_CONTROL__DOORBELL_MODE__SHIFT;
> m->cp_mqd_stride_size = kfd_hiq_mqd_stride(mm->dev);
> @@ -724,6 +724,9 @@ static void update_mqd_v9_4_3(struct mqd_manager *mm,
> void *mqd,
> m = get_mqd(mqd + size * xcc);
> update_mqd(mm, m, q, minfo);
>
> + if (amdgpu_sriov_multi_vf_mode(mm->dev->adev))
> + m->cp_hqd_pq_doorbell_control |= 1 <<
> +
> CP_HQD_PQ_DOORBELL_CONTROL__DOORBELL_MODE__SHIFT;
> update_cu_mask(mm, m, minfo, xcc);
>
> if (q->format == KFD_QUEUE_FORMAT_AQL) {
> @@ -746,6 +749,21 @@ static void update_mqd_v9_4_3(struct mqd_manager *mm,
> void *mqd,
> }
> }
>
> +static void restore_mqd_v9_4_3(struct mqd_manager *mm, void **mqd,
> + struct kfd_mem_obj *mqd_mem_obj, uint64_t *gart_addr,
> + struct queue_properties *qp,
> + const void *mqd_src,
> + const void *ctl_stack_src, u32 ctl_stack_size)
> +{
> + restore_mqd(mm, mqd, mqd_mem_obj, gart_addr, qp, mqd_src,
> ctl_stack_src, ctl_stack_size);
> + if (amdgpu_sriov_multi_vf_mode(mm->dev->adev)) {
> + struct v9_mqd *m;
> +
> + m = (struct v9_mqd *) mqd_mem_obj->cpu_ptr;
> + m->cp_hqd_pq_doorbell_control |= 1 <<
> +
> CP_HQD_PQ_DOORBELL_CONTROL__DOORBELL_MODE__SHIFT;
> + }
> +}
> static int destroy_mqd_v9_4_3(struct mqd_manager *mm, void *mqd,
> enum kfd_preempt_type type, unsigned int timeout,
> uint32_t pipe_id, uint32_t queue_id)
> @@ -880,7 +898,6 @@ struct mqd_manager *mqd_manager_init_v9(enum KFD_MQD_TYPE
> type,
> mqd->is_occupied = kfd_is_occupied_cp;
> mqd->get_checkpoint_info = get_checkpoint_info;
> mqd->checkpoint_mqd = checkpoint_mqd;
> - mqd->restore_mqd = restore_mqd;
> mqd->mqd_size = sizeof(struct v9_mqd);
> mqd->mqd_stride = mqd_stride_v9;
> #if defined(CONFIG_DEBUG_FS)
> @@ -892,12 +909,14 @@ struct mqd_manager *mqd_manager_init_v9(enum
> KFD_MQD_TYPE type,
> mqd->init_mqd = init_mqd_v9_4_3;
> mqd->load_mqd = load_mqd_v9_4_3;
> mqd->update_mqd = update_mqd_v9_4_3;
> + mqd->restore_mqd = restore_mqd_v9_4_3;
> mqd->destroy_mqd = destroy_mqd_v9_4_3;
> mqd->get_wave_state = get_wave_state_v9_4_3;
> } else {
> mqd->init_mqd = init_mqd;
> mqd->load_mqd = load_mqd;
> mqd->update_mqd = update_mqd;
> + mqd->restore_mqd = restore_mqd;
> mqd->destroy_mqd = kfd_destroy_mqd_cp;
> mqd->get_wave_state = get_wave_state;
> }
Better to keep below replacements + addition of new API as a separate
patch (1/2). In 2/2, you may take care of MQD related changes.
Thanks,
Lijo
> diff --git a/drivers/gpu/drm/amd/pm/amdgpu_pm.c
> b/drivers/gpu/drm/amd/pm/amdgpu_pm.c
> index e8ae7681bf0a..9d8119d91f1f 100644
> --- a/drivers/gpu/drm/amd/pm/amdgpu_pm.c
> +++ b/drivers/gpu/drm/amd/pm/amdgpu_pm.c
> @@ -2009,7 +2009,7 @@ static int pp_od_clk_voltage_attr_update(struct
> amdgpu_device *adev, struct amdg
> /* Enable pp_od_clk_voltage node for gc 9.4.3 SRIOV/BM support */
> if (gc_ver == IP_VERSION(9, 4, 3) ||
> gc_ver == IP_VERSION(9, 4, 4)) {
> - if (amdgpu_sriov_vf(adev) && !amdgpu_sriov_is_pp_one_vf(adev))
> + if (amdgpu_sriov_multi_vf_mode(adev))
> *states = ATTR_STATE_UNSUPPORTED;
> return 0;
> }
> @@ -2044,7 +2044,7 @@ static int pp_dpm_dcefclk_attr_update(struct
> amdgpu_device *adev, struct amdgpu_
> * setting should not be allowed from VF if not in one VF mode.
> */
> if (gc_ver >= IP_VERSION(10, 0, 0) ||
> - (amdgpu_sriov_vf(adev) && !amdgpu_sriov_is_pp_one_vf(adev))) {
> + (amdgpu_sriov_multi_vf_mode(adev))) {
> dev_attr->attr.mode &= ~S_IWUGO;
> dev_attr->store = NULL;
> }
> diff --git a/drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c
> b/drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c
> index 8ca793c222ff..b4bdad79221e 100644
> --- a/drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c
> +++ b/drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c
> @@ -1825,7 +1825,7 @@ static int smu_hw_init(struct amdgpu_ip_block *ip_block)
> struct amdgpu_device *adev = ip_block->adev;
> struct smu_context *smu = adev->powerplay.pp_handle;
>
> - if (amdgpu_sriov_vf(adev) && !amdgpu_sriov_is_pp_one_vf(adev)) {
> + if (amdgpu_sriov_multi_vf_mode(adev)) {
> smu->pm_enabled = false;
> return 0;
> }
> @@ -2048,7 +2048,7 @@ static int smu_hw_fini(struct amdgpu_ip_block *ip_block)
> struct smu_context *smu = adev->powerplay.pp_handle;
> int i, ret;
>
> - if (amdgpu_sriov_vf(adev) && !amdgpu_sriov_is_pp_one_vf(adev))
> + if (amdgpu_sriov_multi_vf_mode(adev))
> return 0;
>
> for (i = 0; i < adev->vcn.num_vcn_inst; i++)
> @@ -2116,7 +2116,7 @@ static int smu_suspend(struct amdgpu_ip_block *ip_block)
> int ret;
> uint64_t count;
>
> - if (amdgpu_sriov_vf(adev) && !amdgpu_sriov_is_pp_one_vf(adev))
> + if (amdgpu_sriov_multi_vf_mode(adev))
> return 0;
>
> if (!smu->pm_enabled)
> @@ -2152,7 +2152,7 @@ static int smu_resume(struct amdgpu_ip_block *ip_block)
> struct amdgpu_device *adev = ip_block->adev;
> struct smu_context *smu = adev->powerplay.pp_handle;
>
> - if (amdgpu_sriov_vf(adev)&& !amdgpu_sriov_is_pp_one_vf(adev))
> + if (amdgpu_sriov_multi_vf_mode(adev))
> return 0;
>
> if (!smu->pm_enabled)
