From: Yihan Zhu <yihan....@amd.com>
[WHY & HOW]
No check for HUBP/DPP power gating when DSC instance is still running. Avoid
HUBP/DPP to
power gate when corresponding DSC block is still running in the power gating
calculation.
Reviewed-by: Nicholas Kazlauskas <nicholas.kazlaus...@amd.com>
Reviewed-by: Duncan Ma <duncan...@amd.com>
Signed-off-by: Yihan Zhu <yihan....@amd.com>
Signed-off-by: Roman Li <roman...@amd.com>
Tested-by: Daniel Wheeler <daniel.whee...@amd.com>
---
drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c | 7 ++++++-
1 file changed, 6 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c
b/drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c
index d5f76cc69c73..8207fea4f99a 100644
--- a/drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c
+++ b/drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c
@@ -1032,8 +1032,13 @@ void dcn35_calc_blocks_to_gate(struct dc *dc, struct
dc_state *context,
if (pipe_ctx->plane_res.dpp || pipe_ctx->stream_res.opp)
update_state->pg_pipe_res_update[PG_MPCC][pipe_ctx->plane_res.mpcc_inst] =
false;
- if (pipe_ctx->stream_res.dsc)
+ if (pipe_ctx->stream_res.dsc) {
update_state->pg_pipe_res_update[PG_DSC][pipe_ctx->stream_res.dsc->inst] =
false;
+ if (dc->caps.sequential_ono) {
+
update_state->pg_pipe_res_update[PG_HUBP][pipe_ctx->stream_res.dsc->inst] =
false;
+
update_state->pg_pipe_res_update[PG_DPP][pipe_ctx->stream_res.dsc->inst] =
false;
+ }
+ }
if (pipe_ctx->stream_res.opp)
update_state->pg_pipe_res_update[PG_OPP][pipe_ctx->stream_res.opp->inst] =
false;
--
2.34.1
