Init function is for ras table header read and check function is
responsible for the validation of the header. Call them in different
stages.

Signed-off-by: Tao Zhou <tao.zh...@amd.com>
---
 drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c       | 15 ++++++++++----
 .../gpu/drm/amd/amdgpu/amdgpu_ras_eeprom.c    | 20 +++++++++++++++++++
 .../gpu/drm/amd/amdgpu/amdgpu_ras_eeprom.h    |  2 ++
 3 files changed, 33 insertions(+), 4 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c
index 98bd2ff5aed9..da072ab3fb5c 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c
@@ -3006,9 +3006,20 @@ static int amdgpu_ras_load_bad_pages(struct 
amdgpu_device *adev)
                                control->rec_type = AMDGPU_RAS_EEPROM_REC_MCA;
                }
 
+               ret = amdgpu_ras_eeprom_check(control);
+               if (ret)
+                       goto out;
+
+               /* HW not usable */
+               if (amdgpu_ras_is_rma(adev)) {
+                       ret = -EHWPOISON;
+                       goto out;
+               }
+
                ret = amdgpu_ras_add_bad_pages(adev, bps, 
control->ras_num_recs, true);
        }
 
+out:
        kfree(bps);
        return ret;
 }
@@ -3407,10 +3418,6 @@ int amdgpu_ras_init_badpage_info(struct amdgpu_device 
*adev)
        if (ret)
                return ret;
 
-       /* HW not usable */
-       if (amdgpu_ras_is_rma(adev))
-               return -EHWPOISON;
-
        if (!adev->umc.ras || !adev->umc.ras->convert_ras_err_addr)
                control->rec_type = AMDGPU_RAS_EEPROM_REC_PA;
 
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ras_eeprom.c 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_ras_eeprom.c
index f4a9e15389ae..9dae4ac2f5d0 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ras_eeprom.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ras_eeprom.c
@@ -1382,6 +1382,26 @@ int amdgpu_ras_eeprom_init(struct 
amdgpu_ras_eeprom_control *control)
        }
        control->ras_fri = RAS_OFFSET_TO_INDEX(control, hdr->first_rec_offset);
 
+       return res < 0 ? res : 0;
+}
+
+int amdgpu_ras_eeprom_check(struct amdgpu_ras_eeprom_control *control)
+{
+       struct amdgpu_device *adev = to_amdgpu_device(control);
+       struct amdgpu_ras_eeprom_table_header *hdr = &control->tbl_hdr;
+       struct amdgpu_ras *ras = amdgpu_ras_get_context(adev);
+       int res;
+
+       if (!__is_ras_eeprom_supported(adev))
+               return 0;
+
+       /* Verify i2c adapter is initialized */
+       if (!adev->pm.ras_eeprom_i2c_bus || !adev->pm.ras_eeprom_i2c_bus->algo)
+               return -ENOENT;
+
+       if (!__get_eeprom_i2c_addr(adev, control))
+               return -EINVAL;
+
        if (hdr->header == RAS_TABLE_HDR_VAL) {
                DRM_DEBUG_DRIVER("Found existing EEPROM table with %d records",
                                 control->ras_num_recs);
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ras_eeprom.h 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_ras_eeprom.h
index d3a6f7205a2f..b87422df52fd 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ras_eeprom.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ras_eeprom.h
@@ -159,6 +159,8 @@ uint32_t amdgpu_ras_eeprom_max_record_count(struct 
amdgpu_ras_eeprom_control *co
 
 void amdgpu_ras_debugfs_set_ret_size(struct amdgpu_ras_eeprom_control 
*control);
 
+int amdgpu_ras_eeprom_check(struct amdgpu_ras_eeprom_control *control);
+
 extern const struct file_operations amdgpu_ras_debugfs_eeprom_size_ops;
 extern const struct file_operations amdgpu_ras_debugfs_eeprom_table_ops;
 
-- 
2.34.1

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