From: Boyuan Zhang <boyuan.zh...@amd.com>
Set powergating state by vcn instance in idle_work_handler() and
ring_begin_use() functions for vcn with multiple instances.
v2: Add instance parameter to amdgpu_device_ip_set_powergating_state(),
instead of creating new function.
Signed-off-by: Boyuan Zhang <boyuan.zh...@amd.com>
Reviewed-by: Christian König <christian.koe...@amd.com>
Reviewed-by: Alex Deucher <alexander.deuc...@amd.com>
---
drivers/gpu/drm/amd/amdgpu/amdgpu.h | 3 ++-
drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 6 +++++-
drivers/gpu/drm/amd/amdgpu/amdgpu_jpeg.c | 4 ++--
drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c | 4 ++--
drivers/gpu/drm/amd/amdgpu/amdgpu_vce.c | 4 ++--
drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c | 10 ++++++----
drivers/gpu/drm/amd/amdgpu/amdgpu_vpe.c | 8 ++++----
drivers/gpu/drm/amd/amdgpu/uvd_v3_1.c | 2 +-
drivers/gpu/drm/amd/amdgpu/uvd_v4_2.c | 2 +-
drivers/gpu/drm/amd/amdgpu/uvd_v5_0.c | 2 +-
drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c | 2 +-
drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c | 2 +-
drivers/gpu/drm/amd/amdgpu/vce_v2_0.c | 2 +-
drivers/gpu/drm/amd/amdgpu/vce_v3_0.c | 2 +-
drivers/gpu/drm/amd/amdgpu/vce_v4_0.c | 2 +-
drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c | 4 ++--
drivers/gpu/drm/amd/pm/amdgpu_dpm.c | 6 ++++--
drivers/gpu/drm/amd/pm/legacy-dpm/kv_dpm.c | 8 ++++----
drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu10_hwmgr.c | 6 ++++--
.../amd/pm/powerplay/hwmgr/smu7_clockpowergating.c | 12 ++++++++----
drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu8_hwmgr.c | 12 ++++++++----
.../gpu/drm/amd/pm/powerplay/hwmgr/vega20_hwmgr.c | 6 ++++--
22 files changed, 65 insertions(+), 44 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu.h
b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
index a7cb1d2d6e74..d4c8cc3c1730 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
@@ -357,7 +357,8 @@ int amdgpu_device_ip_set_clockgating_state(void *dev,
enum amd_clockgating_state state);
int amdgpu_device_ip_set_powergating_state(void *dev,
enum amd_ip_block_type block_type,
- enum amd_powergating_state state);
+ enum amd_powergating_state state,
+ int inst);
void amdgpu_device_ip_get_clockgating_state(struct amdgpu_device *adev,
u64 *flags);
int amdgpu_device_ip_wait_for_idle(struct amdgpu_device *adev,
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
index 78b0a162cc7d..6027ecd28fe7 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
@@ -2177,7 +2177,8 @@ int amdgpu_device_ip_set_clockgating_state(void *dev,
*/
int amdgpu_device_ip_set_powergating_state(void *dev,
enum amd_ip_block_type block_type,
- enum amd_powergating_state state)
+ enum amd_powergating_state state,
+ int inst)
{
struct amdgpu_device *adev = dev;
int i, r = 0;
@@ -2187,6 +2188,9 @@ int amdgpu_device_ip_set_powergating_state(void *dev,
continue;
if (adev->ip_blocks[i].version->type != block_type)
continue;
+ if (block_type == AMD_IP_BLOCK_TYPE_VCN &&
+ adev->ip_blocks[i].instance != inst)
+ continue;
if (!adev->ip_blocks[i].version->funcs->set_powergating_state)
continue;
r = adev->ip_blocks[i].version->funcs->set_powergating_state(
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_jpeg.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_jpeg.c
index 95e2796919fc..78fd1ff28a57 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_jpeg.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_jpeg.c
@@ -119,7 +119,7 @@ static void amdgpu_jpeg_idle_work_handler(struct
work_struct *work)
if (!fences && !atomic_read(&adev->jpeg.total_submission_cnt))
amdgpu_device_ip_set_powergating_state(adev,
AMD_IP_BLOCK_TYPE_JPEG,
- AMD_PG_STATE_GATE);
+ AMD_PG_STATE_GATE, 0);
else
schedule_delayed_work(&adev->jpeg.idle_work, JPEG_IDLE_TIMEOUT);
}
@@ -133,7 +133,7 @@ void amdgpu_jpeg_ring_begin_use(struct amdgpu_ring *ring)
mutex_lock(&adev->jpeg.jpeg_pg_lock);
amdgpu_device_ip_set_powergating_state(adev, AMD_IP_BLOCK_TYPE_JPEG,
- AMD_PG_STATE_UNGATE);
+ AMD_PG_STATE_UNGATE, 0);
mutex_unlock(&adev->jpeg.jpeg_pg_lock);
}
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c
index 31fd30dcd593..09844953a1fa 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c
@@ -1277,7 +1277,7 @@ static void amdgpu_uvd_idle_work_handler(struct
work_struct *work)
amdgpu_asic_set_uvd_clocks(adev, 0, 0);
/* shutdown the UVD block */
amdgpu_device_ip_set_powergating_state(adev,
AMD_IP_BLOCK_TYPE_UVD,
-
AMD_PG_STATE_GATE);
+
AMD_PG_STATE_GATE, 0);
amdgpu_device_ip_set_clockgating_state(adev,
AMD_IP_BLOCK_TYPE_UVD,
AMD_CG_STATE_GATE);
}
@@ -1303,7 +1303,7 @@ void amdgpu_uvd_ring_begin_use(struct amdgpu_ring *ring)
amdgpu_device_ip_set_clockgating_state(adev,
AMD_IP_BLOCK_TYPE_UVD,
AMD_CG_STATE_UNGATE);
amdgpu_device_ip_set_powergating_state(adev,
AMD_IP_BLOCK_TYPE_UVD,
-
AMD_PG_STATE_UNGATE);
+
AMD_PG_STATE_UNGATE, 0);
}
}
}
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vce.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_vce.c
index 74fdbf71d95b..a061fb8a2fcf 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_vce.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_vce.c
@@ -344,7 +344,7 @@ static void amdgpu_vce_idle_work_handler(struct work_struct
*work)
} else {
amdgpu_asic_set_vce_clocks(adev, 0, 0);
amdgpu_device_ip_set_powergating_state(adev,
AMD_IP_BLOCK_TYPE_VCE,
-
AMD_PG_STATE_GATE);
+
AMD_PG_STATE_GATE, 0);
amdgpu_device_ip_set_clockgating_state(adev,
AMD_IP_BLOCK_TYPE_VCE,
AMD_CG_STATE_GATE);
}
@@ -378,7 +378,7 @@ void amdgpu_vce_ring_begin_use(struct amdgpu_ring *ring)
amdgpu_device_ip_set_clockgating_state(adev,
AMD_IP_BLOCK_TYPE_VCE,
AMD_CG_STATE_UNGATE);
amdgpu_device_ip_set_powergating_state(adev,
AMD_IP_BLOCK_TYPE_VCE,
-
AMD_PG_STATE_UNGATE);
+
AMD_PG_STATE_UNGATE, 0);
}
}
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c
index 3d2d2a0d98c8..efd6c9eb3502 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c
@@ -416,8 +416,9 @@ static void amdgpu_vcn_idle_work_handler(struct work_struct
*work)
fence += amdgpu_fence_count_emitted(&adev->vcn.inst[inst].ring_dec);
if (!fence && !atomic_read(&adev->vcn.total_submission_cnt)) {
- amdgpu_device_ip_set_powergating_state(adev,
AMD_IP_BLOCK_TYPE_VCN,
- AMD_PG_STATE_GATE);
+ amdgpu_device_ip_set_powergating_state(adev,
+ AMD_IP_BLOCK_TYPE_VCN, AMD_PG_STATE_GATE, inst);
+
r = amdgpu_dpm_switch_power_profile(adev,
PP_SMC_POWER_PROFILE_VIDEO,
false);
if (r)
@@ -442,8 +443,9 @@ void amdgpu_vcn_ring_begin_use(struct amdgpu_ring *ring)
}
mutex_lock(&adev->vcn.vcn_pg_lock);
- amdgpu_device_ip_set_powergating_state(adev, AMD_IP_BLOCK_TYPE_VCN,
- AMD_PG_STATE_UNGATE);
+
+ amdgpu_device_ip_set_powergating_state(adev,
+ AMD_IP_BLOCK_TYPE_VCN, AMD_PG_STATE_UNGATE, ring->me);
/* Only set DPG pause for VCN3 or below, VCN4 and above will be handled
by FW */
if (adev->pg_flags & AMD_PG_SUPPORT_VCN_DPG &&
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vpe.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_vpe.c
index 0a884215f59b..cbc0347a8d95 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_vpe.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_vpe.c
@@ -330,7 +330,7 @@ static void vpe_idle_work_handler(struct work_struct *work)
fences += amdgpu_fence_count_emitted(&adev->vpe.ring);
if (fences == 0)
- amdgpu_device_ip_set_powergating_state(adev,
AMD_IP_BLOCK_TYPE_VPE, AMD_PG_STATE_GATE);
+ amdgpu_device_ip_set_powergating_state(adev,
AMD_IP_BLOCK_TYPE_VPE, AMD_PG_STATE_GATE, 0);
else
schedule_delayed_work(&adev->vpe.idle_work, VPE_IDLE_TIMEOUT);
}
@@ -406,7 +406,7 @@ static int vpe_hw_init(struct amdgpu_ip_block *ip_block)
/* Power on VPE */
ret = amdgpu_device_ip_set_powergating_state(adev,
AMD_IP_BLOCK_TYPE_VPE,
- AMD_PG_STATE_UNGATE);
+ AMD_PG_STATE_UNGATE, 0);
if (ret)
return ret;
@@ -429,7 +429,7 @@ static int vpe_hw_fini(struct amdgpu_ip_block *ip_block)
vpe_ring_stop(vpe);
/* Power off VPE */
- amdgpu_device_ip_set_powergating_state(adev, AMD_IP_BLOCK_TYPE_VPE,
AMD_PG_STATE_GATE);
+ amdgpu_device_ip_set_powergating_state(adev, AMD_IP_BLOCK_TYPE_VPE,
AMD_PG_STATE_GATE, 0);
return 0;
}
@@ -845,7 +845,7 @@ static void vpe_ring_begin_use(struct amdgpu_ring *ring)
uint32_t context_notify;
/* Power on VPE */
- amdgpu_device_ip_set_powergating_state(adev,
AMD_IP_BLOCK_TYPE_VPE, AMD_PG_STATE_UNGATE);
+ amdgpu_device_ip_set_powergating_state(adev,
AMD_IP_BLOCK_TYPE_VPE, AMD_PG_STATE_UNGATE, 0);
/* Indicates that a job from a new context has been submitted.
*/
context_notify = RREG32(vpe_get_reg_offset(vpe, 0,
vpe->regs.context_indicator));
diff --git a/drivers/gpu/drm/amd/amdgpu/uvd_v3_1.c
b/drivers/gpu/drm/amd/amdgpu/uvd_v3_1.c
index 5830e799c0a3..0986f7a83401 100644
--- a/drivers/gpu/drm/amd/amdgpu/uvd_v3_1.c
+++ b/drivers/gpu/drm/amd/amdgpu/uvd_v3_1.c
@@ -735,7 +735,7 @@ static int uvd_v3_1_suspend(struct amdgpu_ip_block
*ip_block)
amdgpu_asic_set_uvd_clocks(adev, 0, 0);
/* shutdown the UVD block */
amdgpu_device_ip_set_powergating_state(adev,
AMD_IP_BLOCK_TYPE_UVD,
- AMD_PG_STATE_GATE);
+ AMD_PG_STATE_GATE, 0);
amdgpu_device_ip_set_clockgating_state(adev,
AMD_IP_BLOCK_TYPE_UVD,
AMD_CG_STATE_GATE);
}
diff --git a/drivers/gpu/drm/amd/amdgpu/uvd_v4_2.c
b/drivers/gpu/drm/amd/amdgpu/uvd_v4_2.c
index f93079e09215..565632478c3e 100644
--- a/drivers/gpu/drm/amd/amdgpu/uvd_v4_2.c
+++ b/drivers/gpu/drm/amd/amdgpu/uvd_v4_2.c
@@ -249,7 +249,7 @@ static int uvd_v4_2_suspend(struct amdgpu_ip_block
*ip_block)
amdgpu_asic_set_uvd_clocks(adev, 0, 0);
/* shutdown the UVD block */
amdgpu_device_ip_set_powergating_state(adev,
AMD_IP_BLOCK_TYPE_UVD,
- AMD_PG_STATE_GATE);
+ AMD_PG_STATE_GATE, 0);
amdgpu_device_ip_set_clockgating_state(adev,
AMD_IP_BLOCK_TYPE_UVD,
AMD_CG_STATE_GATE);
}
diff --git a/drivers/gpu/drm/amd/amdgpu/uvd_v5_0.c
b/drivers/gpu/drm/amd/amdgpu/uvd_v5_0.c
index 050a0f309390..ce7f205899f2 100644
--- a/drivers/gpu/drm/amd/amdgpu/uvd_v5_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/uvd_v5_0.c
@@ -247,7 +247,7 @@ static int uvd_v5_0_suspend(struct amdgpu_ip_block
*ip_block)
amdgpu_asic_set_uvd_clocks(adev, 0, 0);
/* shutdown the UVD block */
amdgpu_device_ip_set_powergating_state(adev,
AMD_IP_BLOCK_TYPE_UVD,
- AMD_PG_STATE_GATE);
+ AMD_PG_STATE_GATE, 0);
amdgpu_device_ip_set_clockgating_state(adev,
AMD_IP_BLOCK_TYPE_UVD,
AMD_CG_STATE_GATE);
}
diff --git a/drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c
b/drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c
index d9d036ee51fb..ccf8dde8cd71 100644
--- a/drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c
@@ -571,7 +571,7 @@ static int uvd_v6_0_suspend(struct amdgpu_ip_block
*ip_block)
amdgpu_asic_set_uvd_clocks(adev, 0, 0);
/* shutdown the UVD block */
amdgpu_device_ip_set_powergating_state(adev,
AMD_IP_BLOCK_TYPE_UVD,
- AMD_PG_STATE_GATE);
+ AMD_PG_STATE_GATE, 0);
amdgpu_device_ip_set_clockgating_state(adev,
AMD_IP_BLOCK_TYPE_UVD,
AMD_CG_STATE_GATE);
}
diff --git a/drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c
b/drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c
index 53249d4ff8ec..c93eb5122bd1 100644
--- a/drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c
@@ -639,7 +639,7 @@ static int uvd_v7_0_suspend(struct amdgpu_ip_block
*ip_block)
amdgpu_asic_set_uvd_clocks(adev, 0, 0);
/* shutdown the UVD block */
amdgpu_device_ip_set_powergating_state(adev,
AMD_IP_BLOCK_TYPE_UVD,
- AMD_PG_STATE_GATE);
+ AMD_PG_STATE_GATE, 0);
amdgpu_device_ip_set_clockgating_state(adev,
AMD_IP_BLOCK_TYPE_UVD,
AMD_CG_STATE_GATE);
}
diff --git a/drivers/gpu/drm/amd/amdgpu/vce_v2_0.c
b/drivers/gpu/drm/amd/amdgpu/vce_v2_0.c
index c633b7ff2943..4b4d295802a2 100644
--- a/drivers/gpu/drm/amd/amdgpu/vce_v2_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/vce_v2_0.c
@@ -512,7 +512,7 @@ static int vce_v2_0_suspend(struct amdgpu_ip_block
*ip_block)
} else {
amdgpu_asic_set_vce_clocks(adev, 0, 0);
amdgpu_device_ip_set_powergating_state(adev,
AMD_IP_BLOCK_TYPE_VCE,
- AMD_PG_STATE_GATE);
+ AMD_PG_STATE_GATE, 0);
amdgpu_device_ip_set_clockgating_state(adev,
AMD_IP_BLOCK_TYPE_VCE,
AMD_CG_STATE_GATE);
}
diff --git a/drivers/gpu/drm/amd/amdgpu/vce_v3_0.c
b/drivers/gpu/drm/amd/amdgpu/vce_v3_0.c
index f8bddcd19b68..fc7d80c2a841 100644
--- a/drivers/gpu/drm/amd/amdgpu/vce_v3_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/vce_v3_0.c
@@ -523,7 +523,7 @@ static int vce_v3_0_suspend(struct amdgpu_ip_block
*ip_block)
} else {
amdgpu_asic_set_vce_clocks(adev, 0, 0);
amdgpu_device_ip_set_powergating_state(adev,
AMD_IP_BLOCK_TYPE_VCE,
- AMD_PG_STATE_GATE);
+ AMD_PG_STATE_GATE, 0);
amdgpu_device_ip_set_clockgating_state(adev,
AMD_IP_BLOCK_TYPE_VCE,
AMD_CG_STATE_GATE);
}
diff --git a/drivers/gpu/drm/amd/amdgpu/vce_v4_0.c
b/drivers/gpu/drm/amd/amdgpu/vce_v4_0.c
index 335bda64ff5b..e7b6f8cc8b74 100644
--- a/drivers/gpu/drm/amd/amdgpu/vce_v4_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/vce_v4_0.c
@@ -589,7 +589,7 @@ static int vce_v4_0_suspend(struct amdgpu_ip_block
*ip_block)
} else {
amdgpu_asic_set_vce_clocks(adev, 0, 0);
amdgpu_device_ip_set_powergating_state(adev,
AMD_IP_BLOCK_TYPE_VCE,
- AMD_PG_STATE_GATE);
+ AMD_PG_STATE_GATE, 0);
amdgpu_device_ip_set_clockgating_state(adev,
AMD_IP_BLOCK_TYPE_VCE,
AMD_CG_STATE_GATE);
}
diff --git a/drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c
b/drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c
index f07a5a8393c0..8b860db34584 100644
--- a/drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c
@@ -1861,7 +1861,7 @@ static void vcn_v1_0_idle_work_handler(struct work_struct
*work)
amdgpu_dpm_enable_vcn(adev, false, 0);
else
amdgpu_device_ip_set_powergating_state(adev,
AMD_IP_BLOCK_TYPE_VCN,
- AMD_PG_STATE_GATE);
+ AMD_PG_STATE_GATE, 0);
} else {
schedule_delayed_work(&adev->vcn.inst[0].idle_work,
VCN_IDLE_TIMEOUT);
}
@@ -1891,7 +1891,7 @@ void vcn_v1_0_set_pg_for_begin_use(struct amdgpu_ring
*ring, bool set_clocks)
amdgpu_dpm_enable_vcn(adev, true, 0);
else
amdgpu_device_ip_set_powergating_state(adev,
AMD_IP_BLOCK_TYPE_VCN,
- AMD_PG_STATE_UNGATE);
+ AMD_PG_STATE_UNGATE, 0);
}
if (adev->pg_flags & AMD_PG_SUPPORT_VCN_DPG) {
diff --git a/drivers/gpu/drm/amd/pm/amdgpu_dpm.c
b/drivers/gpu/drm/amd/pm/amdgpu_dpm.c
index 14a4341d4f0f..0f7394a56821 100644
--- a/drivers/gpu/drm/amd/pm/amdgpu_dpm.c
+++ b/drivers/gpu/drm/amd/pm/amdgpu_dpm.c
@@ -1012,7 +1012,8 @@ int amdgpu_dpm_force_performance_level(struct
amdgpu_device *adev,
/* enter UMD Pstate */
amdgpu_device_ip_set_powergating_state(adev,
AMD_IP_BLOCK_TYPE_GFX,
- AMD_PG_STATE_UNGATE);
+ AMD_PG_STATE_UNGATE,
+ 0);
amdgpu_device_ip_set_clockgating_state(adev,
AMD_IP_BLOCK_TYPE_GFX,
AMD_CG_STATE_UNGATE);
@@ -1024,7 +1025,8 @@ int amdgpu_dpm_force_performance_level(struct
amdgpu_device *adev,
AMD_CG_STATE_GATE);
amdgpu_device_ip_set_powergating_state(adev,
AMD_IP_BLOCK_TYPE_GFX,
- AMD_PG_STATE_GATE);
+ AMD_PG_STATE_GATE,
+ 0);
}
mutex_lock(&adev->pm.mutex);
diff --git a/drivers/gpu/drm/amd/pm/legacy-dpm/kv_dpm.c
b/drivers/gpu/drm/amd/pm/legacy-dpm/kv_dpm.c
index 67a8e22b1126..e54be4b386f2 100644
--- a/drivers/gpu/drm/amd/pm/legacy-dpm/kv_dpm.c
+++ b/drivers/gpu/drm/amd/pm/legacy-dpm/kv_dpm.c
@@ -1675,7 +1675,7 @@ static void kv_dpm_powergate_uvd(void *handle, bool gate)
if (gate) {
/* stop the UVD block */
amdgpu_device_ip_set_powergating_state(adev,
AMD_IP_BLOCK_TYPE_UVD,
- AMD_PG_STATE_GATE);
+ AMD_PG_STATE_GATE, 0);
kv_update_uvd_dpm(adev, gate);
if (pi->caps_uvd_pg)
/* power off the UVD block */
@@ -1688,7 +1688,7 @@ static void kv_dpm_powergate_uvd(void *handle, bool gate)
kv_update_uvd_dpm(adev, gate);
amdgpu_device_ip_set_powergating_state(adev,
AMD_IP_BLOCK_TYPE_UVD,
- AMD_PG_STATE_UNGATE);
+ AMD_PG_STATE_UNGATE, 0);
}
}
@@ -1702,7 +1702,7 @@ static void kv_dpm_powergate_vce(void *handle, bool gate)
if (gate) {
/* stop the VCE block */
amdgpu_device_ip_set_powergating_state(adev,
AMD_IP_BLOCK_TYPE_VCE,
- AMD_PG_STATE_GATE);
+ AMD_PG_STATE_GATE, 0);
kv_enable_vce_dpm(adev, false);
if (pi->caps_vce_pg) /* power off the VCE block */
amdgpu_kv_notify_message_to_smu(adev,
PPSMC_MSG_VCEPowerOFF);
@@ -1712,7 +1712,7 @@ static void kv_dpm_powergate_vce(void *handle, bool gate)
kv_enable_vce_dpm(adev, true);
/* re-init the VCE block */
amdgpu_device_ip_set_powergating_state(adev,
AMD_IP_BLOCK_TYPE_VCE,
- AMD_PG_STATE_UNGATE);
+ AMD_PG_STATE_UNGATE, 0);
}
}
diff --git a/drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu10_hwmgr.c
b/drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu10_hwmgr.c
index a8c732e07006..41dbf043f59b 100644
--- a/drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu10_hwmgr.c
+++ b/drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu10_hwmgr.c
@@ -1407,7 +1407,8 @@ static void smu10_powergate_vcn(struct pp_hwmgr *hwmgr,
bool bgate)
if (bgate) {
amdgpu_device_ip_set_powergating_state(hwmgr->adev,
AMD_IP_BLOCK_TYPE_VCN,
- AMD_PG_STATE_GATE);
+ AMD_PG_STATE_GATE,
+ 0);
smum_send_msg_to_smc_with_parameter(hwmgr,
PPSMC_MSG_PowerDownVcn, 0, NULL);
smu10_data->vcn_power_gated = true;
@@ -1416,7 +1417,8 @@ static void smu10_powergate_vcn(struct pp_hwmgr *hwmgr,
bool bgate)
PPSMC_MSG_PowerUpVcn, 0, NULL);
amdgpu_device_ip_set_powergating_state(hwmgr->adev,
AMD_IP_BLOCK_TYPE_VCN,
- AMD_PG_STATE_UNGATE);
+ AMD_PG_STATE_UNGATE,
+ 0);
smu10_data->vcn_power_gated = false;
}
}
diff --git a/drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu7_clockpowergating.c
b/drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu7_clockpowergating.c
index f2bda3bcbbde..b496b77153e9 100644
--- a/drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu7_clockpowergating.c
+++ b/drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu7_clockpowergating.c
@@ -120,7 +120,8 @@ void smu7_powergate_uvd(struct pp_hwmgr *hwmgr, bool bgate)
if (bgate) {
amdgpu_device_ip_set_powergating_state(hwmgr->adev,
AMD_IP_BLOCK_TYPE_UVD,
- AMD_PG_STATE_GATE);
+ AMD_PG_STATE_GATE,
+ 0);
amdgpu_device_ip_set_clockgating_state(hwmgr->adev,
AMD_IP_BLOCK_TYPE_UVD,
AMD_CG_STATE_GATE);
@@ -133,7 +134,8 @@ void smu7_powergate_uvd(struct pp_hwmgr *hwmgr, bool bgate)
AMD_CG_STATE_UNGATE);
amdgpu_device_ip_set_powergating_state(hwmgr->adev,
AMD_IP_BLOCK_TYPE_UVD,
- AMD_PG_STATE_UNGATE);
+ AMD_PG_STATE_UNGATE,
+ 0);
smu7_update_uvd_dpm(hwmgr, false);
}
@@ -148,7 +150,8 @@ void smu7_powergate_vce(struct pp_hwmgr *hwmgr, bool bgate)
if (bgate) {
amdgpu_device_ip_set_powergating_state(hwmgr->adev,
AMD_IP_BLOCK_TYPE_VCE,
- AMD_PG_STATE_GATE);
+ AMD_PG_STATE_GATE,
+ 0);
amdgpu_device_ip_set_clockgating_state(hwmgr->adev,
AMD_IP_BLOCK_TYPE_VCE,
AMD_CG_STATE_GATE);
@@ -161,7 +164,8 @@ void smu7_powergate_vce(struct pp_hwmgr *hwmgr, bool bgate)
AMD_CG_STATE_UNGATE);
amdgpu_device_ip_set_powergating_state(hwmgr->adev,
AMD_IP_BLOCK_TYPE_VCE,
- AMD_PG_STATE_UNGATE);
+ AMD_PG_STATE_UNGATE,
+ 0);
smu7_update_vce_dpm(hwmgr, false);
}
}
diff --git a/drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu8_hwmgr.c
b/drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu8_hwmgr.c
index 7e1197420873..2ccce2bc3b4a 100644
--- a/drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu8_hwmgr.c
+++ b/drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu8_hwmgr.c
@@ -1985,7 +1985,8 @@ static void smu8_dpm_powergate_uvd(struct pp_hwmgr
*hwmgr, bool bgate)
if (bgate) {
amdgpu_device_ip_set_powergating_state(hwmgr->adev,
AMD_IP_BLOCK_TYPE_UVD,
- AMD_PG_STATE_GATE);
+ AMD_PG_STATE_GATE,
+ 0);
amdgpu_device_ip_set_clockgating_state(hwmgr->adev,
AMD_IP_BLOCK_TYPE_UVD,
AMD_CG_STATE_GATE);
@@ -1998,7 +1999,8 @@ static void smu8_dpm_powergate_uvd(struct pp_hwmgr
*hwmgr, bool bgate)
AMD_CG_STATE_UNGATE);
amdgpu_device_ip_set_powergating_state(hwmgr->adev,
AMD_IP_BLOCK_TYPE_UVD,
- AMD_PG_STATE_UNGATE);
+ AMD_PG_STATE_UNGATE,
+ 0);
smu8_dpm_update_uvd_dpm(hwmgr, false);
}
@@ -2017,7 +2019,8 @@ static void smu8_dpm_powergate_vce(struct pp_hwmgr
*hwmgr, bool bgate)
if (bgate) {
amdgpu_device_ip_set_powergating_state(hwmgr->adev,
AMD_IP_BLOCK_TYPE_VCE,
- AMD_PG_STATE_GATE);
+ AMD_PG_STATE_GATE,
+ 0);
amdgpu_device_ip_set_clockgating_state(hwmgr->adev,
AMD_IP_BLOCK_TYPE_VCE,
AMD_CG_STATE_GATE);
@@ -2032,7 +2035,8 @@ static void smu8_dpm_powergate_vce(struct pp_hwmgr
*hwmgr, bool bgate)
AMD_CG_STATE_UNGATE);
amdgpu_device_ip_set_powergating_state(hwmgr->adev,
AMD_IP_BLOCK_TYPE_VCE,
- AMD_PG_STATE_UNGATE);
+ AMD_PG_STATE_UNGATE,
+ 0);
smu8_dpm_update_vce_dpm(hwmgr);
smu8_enable_disable_vce_dpm(hwmgr, true);
}
diff --git a/drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega20_hwmgr.c
b/drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega20_hwmgr.c
index baf251fe5d82..64ef8c8398ff 100644
--- a/drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega20_hwmgr.c
+++ b/drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega20_hwmgr.c
@@ -3715,11 +3715,13 @@ static void vega20_power_gate_vce(struct pp_hwmgr
*hwmgr, bool bgate)
vega20_enable_disable_vce_dpm(hwmgr, !bgate);
amdgpu_device_ip_set_powergating_state(hwmgr->adev,
AMD_IP_BLOCK_TYPE_VCE,
- AMD_PG_STATE_GATE);
+ AMD_PG_STATE_GATE,
+ 0);
} else {
amdgpu_device_ip_set_powergating_state(hwmgr->adev,
AMD_IP_BLOCK_TYPE_VCE,
- AMD_PG_STATE_UNGATE);
+ AMD_PG_STATE_UNGATE,
+ 0);
vega20_enable_disable_vce_dpm(hwmgr, !bgate);
}
--
2.34.1
