From: Sridevi Arvindekar <sarvi...@amd.com>
Assign socclk_khz value from dcn4x.
Reviewed-by: Ariel Bernstein <eric.bernst...@amd.com>
Signed-off-by: Sridevi Arvindekar <sarvi...@amd.com>
Signed-off-by: Rodrigo Siqueira <rodrigo.sique...@amd.com>
---
.../gpu/drm/amd/display/dc/dml2/dml21/dml21_translation_helper.c | 1 +
1 file changed, 1 insertion(+)
diff --git
a/drivers/gpu/drm/amd/display/dc/dml2/dml21/dml21_translation_helper.c
b/drivers/gpu/drm/amd/display/dc/dml2/dml21/dml21_translation_helper.c
index 8697eac1e1f7..7a01a956e4bb 100644
--- a/drivers/gpu/drm/amd/display/dc/dml2/dml21/dml21_translation_helper.c
+++ b/drivers/gpu/drm/amd/display/dc/dml2/dml21/dml21_translation_helper.c
@@ -1036,6 +1036,7 @@ void dml21_copy_clocks_to_dc_state(struct dml2_context
*in_ctx, struct dc_state
context->bw_ctx.bw.dcn.clk.p_state_change_support =
in_ctx->v21.mode_programming.programming->uclk_pstate_supported;
context->bw_ctx.bw.dcn.clk.dtbclk_en =
in_ctx->v21.mode_programming.programming->min_clocks.dcn4x.dtbrefclk_khz > 0;
context->bw_ctx.bw.dcn.clk.ref_dtbclk_khz =
in_ctx->v21.mode_programming.programming->min_clocks.dcn4x.dtbrefclk_khz;
+ context->bw_ctx.bw.dcn.clk.socclk_khz =
in_ctx->v21.mode_programming.programming->min_clocks.dcn4x.socclk_khz;
}
void dml21_extract_legacy_watermark_set(const struct dc *in_dc, struct
dcn_watermarks *watermark, enum dml2_dchub_watermark_reg_set_index reg_set_idx,
struct dml2_context *in_ctx)
--
2.45.2
