Apply KIQ logic to MES.
MES doesn't really use the GPU scheduler. The base
drivers generally use the MES ring directly rather than
submitting IBs. However, amdgpu_sched_hw_submission
(which defaults to 2) limits the number of outstanding
fences to 2. KFD uses the MES for TLB flushes and the
2 fence limit hurts performance when there are several KFD
processes running.
Signed-off-by: Alex Deucher <alexander.deuc...@amd.com>
Cc: Jack Xiao <jack.x...@amd.com>
Cc: christian.koe...@amd.com
---
Jack, does this fix the overflow issue?
drivers/gpu/drm/amd/amdgpu/amdgpu_ring.c | 7 ++++---
1 file changed, 4 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.c
index ad49cecb20b8..345823d14113 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.c
@@ -204,13 +204,14 @@ int amdgpu_ring_init(struct amdgpu_device *adev, struct
amdgpu_ring *ring,
u32 hw_ip;
unsigned int max_ibs_dw;
- /* Set the hw submission limit higher for KIQ because
+ /* Set the hw submission limit higher for KIQ/MES because
* it's used for a number of gfx/compute tasks by both
* KFD and KGD which may have outstanding fences and
* it doesn't really use the gpu scheduler anyway;
- * KIQ tasks get submitted directly to the ring.
+ * KIQ/MES tasks get submitted directly to the ring.
*/
- if (ring->funcs->type == AMDGPU_RING_TYPE_KIQ)
+ if ((ring->funcs->type == AMDGPU_RING_TYPE_KIQ) ||
+ (ring->funcs->type == AMDGPU_RING_TYPE_MES))
sched_hw_submission = max(sched_hw_submission, 256);
else if (ring == &adev->sdma.instance[0].page)
sched_hw_submission = 256;
--
2.45.2
