This will be used in more places in the future so
add a mutex.

Signed-off-by: Alex Deucher <alexander.deuc...@amd.com>
---
 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c |  1 +
 drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.h    |  2 ++
 drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c     | 10 +++++++---
 3 files changed, 10 insertions(+), 3 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
index bcacf2e35eba..dcffd57da8db 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
@@ -4055,6 +4055,7 @@ int amdgpu_device_init(struct amdgpu_device *adev,
        mutex_init(&adev->notifier_lock);
        mutex_init(&adev->pm.stable_pstate_ctx_lock);
        mutex_init(&adev->benchmark_mutex);
+       mutex_init(&adev->gfx.reset_sem_mutex);
 
        amdgpu_device_init_apu_flags(adev);
 
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.h 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.h
index 6fe77e483bb7..17b945b545b4 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.h
@@ -444,6 +444,8 @@ struct amdgpu_gfx {
        uint32_t                        *ip_dump_core;
        uint32_t                        *ip_dump_compute_queues;
        uint32_t                        *ip_dump_gfx_queues;
+
+       struct mutex                    reset_sem_mutex;
 };
 
 struct amdgpu_gfx_ras_reg_entry {
diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c 
b/drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c
index 9bd42533ce61..37af298d0918 100644
--- a/drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c
@@ -4725,10 +4725,12 @@ static int gfx_v11_0_wait_for_idle(void *handle)
 }
 
 static int gfx_v11_0_request_gfx_index_mutex(struct amdgpu_device *adev,
-                                            int req)
+                                            bool req)
 {
        u32 i, tmp, val;
 
+       if (req)
+               mutex_lock(&adev->gfx.reset_sem_mutex);
        for (i = 0; i < adev->usec_timeout; i++) {
                /* Request with MeId=2, PipeId=0 */
                tmp = REG_SET_FIELD(0, CP_GFX_INDEX_MUTEX, REQUEST, req);
@@ -4749,6 +4751,8 @@ static int gfx_v11_0_request_gfx_index_mutex(struct 
amdgpu_device *adev,
                }
                udelay(1);
        }
+       if (!req)
+               mutex_unlock(&adev->gfx.reset_sem_mutex);
 
        if (i >= adev->usec_timeout)
                return -EINVAL;
@@ -4796,7 +4800,7 @@ static int gfx_v11_0_soft_reset(void *handle)
        mutex_unlock(&adev->srbm_mutex);
 
        /* Try to acquire the gfx mutex before access to CP_VMID_RESET */
-       r = gfx_v11_0_request_gfx_index_mutex(adev, 1);
+       r = gfx_v11_0_request_gfx_index_mutex(adev, true);
        if (r) {
                DRM_ERROR("Failed to acquire the gfx mutex during soft 
reset\n");
                return r;
@@ -4811,7 +4815,7 @@ static int gfx_v11_0_soft_reset(void *handle)
        RREG32_SOC15(GC, 0, regCP_VMID_RESET);
 
        /* release the gfx mutex */
-       r = gfx_v11_0_request_gfx_index_mutex(adev, 0);
+       r = gfx_v11_0_request_gfx_index_mutex(adev, false);
        if (r) {
                DRM_ERROR("Failed to release the gfx mutex during soft 
reset\n");
                return r;
-- 
2.45.2

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