Add API for resetting kernel queues.

Signed-off-by: Alex Deucher <alexander.deuc...@amd.com>
---
 drivers/gpu/drm/amd/amdgpu/mes_v12_0.c | 33 ++++++++++++++++++++++++++
 1 file changed, 33 insertions(+)

diff --git a/drivers/gpu/drm/amd/amdgpu/mes_v12_0.c 
b/drivers/gpu/drm/amd/amdgpu/mes_v12_0.c
index c9f74231ad59..14b8c88fb0e0 100644
--- a/drivers/gpu/drm/amd/amdgpu/mes_v12_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/mes_v12_0.c
@@ -634,6 +634,38 @@ static void mes_v12_0_enable_unmapped_doorbell_handling(
        WREG32_SOC15(GC, 0, regCP_UNMAPPED_DOORBELL, data);
 }
 
+static int mes_v12_0_reset_legacy_queue(struct amdgpu_mes *mes,
+                                       struct mes_reset_legacy_queue_input 
*input)
+{
+       union MESAPI__RESET mes_reset_queue_pkt;
+
+       memset(&mes_reset_queue_pkt, 0, sizeof(mes_reset_queue_pkt));
+
+       mes_reset_queue_pkt.header.type = MES_API_TYPE_SCHEDULER;
+       mes_reset_queue_pkt.header.opcode = MES_SCH_API_RESET;
+       mes_reset_queue_pkt.header.dwsize = API_FRAME_SIZE_IN_DWORDS;
+
+       mes_reset_queue_pkt.queue_type =
+               convert_to_mes_queue_type(input->queue_type);
+
+       if (mes_reset_queue_pkt.queue_type == MES_QUEUE_TYPE_GFX) {
+               mes_reset_queue_pkt.reset_legacy_gfx = 1;
+               mes_reset_queue_pkt.pipe_id_lp = input->pipe_id;
+               mes_reset_queue_pkt.queue_id_lp = input->queue_id;
+               mes_reset_queue_pkt.mqd_mc_addr_lp = input->mqd_addr;
+               mes_reset_queue_pkt.doorbell_offset_lp = input->doorbell_offset;
+               mes_reset_queue_pkt.wptr_addr_lp = input->wptr_addr;
+               mes_reset_queue_pkt.vmid_id_lp = input->vmid;
+       } else {
+               mes_reset_queue_pkt.reset_queue_only = 1;
+               mes_reset_queue_pkt.doorbell_offset = input->doorbell_offset;
+       }
+
+       return mes_v12_0_submit_pkt_and_poll_completion(mes,
+                       &mes_reset_queue_pkt, sizeof(mes_reset_queue_pkt),
+                       offsetof(union MESAPI__RESET, api_status));
+}
+
 static const struct amdgpu_mes_funcs mes_v12_0_funcs = {
        .add_hw_queue = mes_v12_0_add_hw_queue,
        .remove_hw_queue = mes_v12_0_remove_hw_queue,
@@ -642,6 +674,7 @@ static const struct amdgpu_mes_funcs mes_v12_0_funcs = {
        .suspend_gang = mes_v12_0_suspend_gang,
        .resume_gang = mes_v12_0_resume_gang,
        .misc_op = mes_v12_0_misc_op,
+       .reset_legacy_queue = mes_v12_0_reset_legacy_queue,
 };
 
 static int mes_v12_0_allocate_ucode_buffer(struct amdgpu_device *adev,
-- 
2.45.2

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