[PATCH v3 8/8] drm/amdgpu: fix missing reset domain locks

[Yunxiang Li]

These functions are missing the lock for reset domain.

Signed-off-by: Yunxiang Li <yunxiang...@amd.com>
---
v3: only bracket amdgpu_device_flush_hdp with the read lock,
    amdgpu_gmc_flush_gpu_tlb already takes the lock 

 drivers/gpu/drm/amd/amdgpu/amdgpu_gart.c               | 6 +++++-
 drivers/gpu/drm/amd/amdkfd/kfd_process_queue_manager.c | 9 +++++++--
 2 files changed, 12 insertions(+), 3 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_gart.c 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_gart.c
index eb172388d99e..256b95232de5 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_gart.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_gart.c
@@ -34,6 +34,7 @@
 #include <asm/set_memory.h>
 #endif
 #include "amdgpu.h"
+#include "amdgpu_reset.h"
 #include <drm/drm_drv.h>
 #include <drm/ttm/ttm_tt.h>
 
@@ -405,7 +406,10 @@ void amdgpu_gart_invalidate_tlb(struct amdgpu_device *adev)
                return;
 
        mb();
-       amdgpu_device_flush_hdp(adev, NULL);
+       if (down_read_trylock(&adev->reset_domain->sem)) {
+               amdgpu_device_flush_hdp(adev, NULL);
+               up_read(&adev->reset_domain->sem);
+       }
        for_each_set_bit(i, adev->vmhubs_mask, AMDGPU_MAX_VMHUBS)
                amdgpu_gmc_flush_gpu_tlb(adev, 0, i, 0);
 }
diff --git a/drivers/gpu/drm/amd/amdkfd/kfd_process_queue_manager.c 
b/drivers/gpu/drm/amd/amdkfd/kfd_process_queue_manager.c
index 86ea610b16f3..21f5a1fb3bf8 100644
--- a/drivers/gpu/drm/amd/amdkfd/kfd_process_queue_manager.c
+++ b/drivers/gpu/drm/amd/amdkfd/kfd_process_queue_manager.c
@@ -28,6 +28,7 @@
 #include "kfd_priv.h"
 #include "kfd_kernel_queue.h"
 #include "amdgpu_amdkfd.h"
+#include "amdgpu_reset.h"
 
 static inline struct process_queue_node *get_queue_by_qid(
                        struct process_queue_manager *pqm, unsigned int qid)
@@ -87,8 +88,12 @@ void kfd_process_dequeue_from_device(struct 
kfd_process_device *pdd)
                return;
 
        dev->dqm->ops.process_termination(dev->dqm, &pdd->qpd);
-       if (dev->kfd->shared_resources.enable_mes)
-               amdgpu_mes_flush_shader_debugger(dev->adev, 
pdd->proc_ctx_gpu_addr);
+       if (dev->kfd->shared_resources.enable_mes &&
+           down_read_trylock(&dev->adev->reset_domain->sem)) {
+               amdgpu_mes_flush_shader_debugger(dev->adev,
+                                                pdd->proc_ctx_gpu_addr);
+               up_read(&dev->adev->reset_domain->sem);
+       }
        pdd->already_dequeued = true;
 }
 
-- 
2.34.1