[PATCH 23/31] drm/amd/amdgpu: update GFX12 wave data registers

[Alex Deucher]

From: Tom St Denis <tom.stde...@amd.com>

Signed-off-by: Tom St Denis <tom.stde...@amd.com>
Reviewed-by: Jonathan Kim <jonathan....@amd.com>
Signed-off-by: Alex Deucher <alexander.deuc...@amd.com>
---
 drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c | 13 +++++++++++--
 1 file changed, 11 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c 
b/drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c
index 68a66ccb0100d..730d57a10077f 100644
--- a/drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c
@@ -659,8 +659,8 @@ static void gfx_v12_0_read_wave_data(struct amdgpu_device 
*adev,
         * zero here */
        WARN_ON(simd != 0);
 
-       /* type 3 wave data */
-       dst[(*no_fields)++] = 3;
+       /* type 4 wave data */
+       dst[(*no_fields)++] = 4;
        dst[(*no_fields)++] = wave_read_ind(adev, wave, ixSQ_WAVE_STATUS);
        dst[(*no_fields)++] = wave_read_ind(adev, wave, ixSQ_WAVE_PC_LO);
        dst[(*no_fields)++] = wave_read_ind(adev, wave, ixSQ_WAVE_PC_HI);
@@ -675,6 +675,15 @@ static void gfx_v12_0_read_wave_data(struct amdgpu_device 
*adev,
        dst[(*no_fields)++] = wave_read_ind(adev, wave, ixSQ_WAVE_IB_DBG1);
        dst[(*no_fields)++] = wave_read_ind(adev, wave, ixSQ_WAVE_M0);
        dst[(*no_fields)++] = wave_read_ind(adev, wave, ixSQ_WAVE_MODE);
+       dst[(*no_fields)++] = wave_read_ind(adev, wave, ixSQ_WAVE_STATE_PRIV);
+       dst[(*no_fields)++] = wave_read_ind(adev, wave, 
ixSQ_WAVE_EXCP_FLAG_PRIV);
+       dst[(*no_fields)++] = wave_read_ind(adev, wave, 
ixSQ_WAVE_EXCP_FLAG_USER);
+       dst[(*no_fields)++] = wave_read_ind(adev, wave, ixSQ_WAVE_TRAP_CTRL);
+       dst[(*no_fields)++] = wave_read_ind(adev, wave, ixSQ_WAVE_ACTIVE);
+       dst[(*no_fields)++] = wave_read_ind(adev, wave, 
ixSQ_WAVE_VALID_AND_IDLE);
+       dst[(*no_fields)++] = wave_read_ind(adev, wave, 
ixSQ_WAVE_DVGPR_ALLOC_LO);
+       dst[(*no_fields)++] = wave_read_ind(adev, wave, 
ixSQ_WAVE_DVGPR_ALLOC_HI);
+       dst[(*no_fields)++] = wave_read_ind(adev, wave, ixSQ_WAVE_SCHED_MODE);
 }
 
 static void gfx_v12_0_read_wave_sgprs(struct amdgpu_device *adev,
-- 
2.44.0