On GFX 9.4.3 SOCs, only 2 SDMA instances need to be available to be
considered as a valid AID.

Signed-off-by: Lijo Lazar <lijo.la...@amd.com>
Reviewed-by: Asad Kamal <asad.ka...@amd.com>
---
 drivers/gpu/drm/amd/amdgpu/aqua_vanjaram.c | 7 ++++---
 1 file changed, 4 insertions(+), 3 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/aqua_vanjaram.c 
b/drivers/gpu/drm/amd/amdgpu/aqua_vanjaram.c
index fbf5f65ab091..bdab65bc3105 100644
--- a/drivers/gpu/drm/amd/amdgpu/aqua_vanjaram.c
+++ b/drivers/gpu/drm/amd/amdgpu/aqua_vanjaram.c
@@ -649,7 +649,7 @@ static void aqua_vanjaram_down_config(struct amdgpu_device 
*adev)
 
 int aqua_vanjaram_init_soc_config(struct amdgpu_device *adev)
 {
-       u32 mask, inst_mask = adev->sdma.sdma_mask, sdma_pres;
+       u32 mask, avail_inst, inst_mask = adev->sdma.sdma_mask;
        int ret, i;
 
        aqua_vanjaram_down_config(adev);
@@ -662,8 +662,9 @@ int aqua_vanjaram_init_soc_config(struct amdgpu_device 
*adev)
 
        for (mask = (1 << adev->sdma.num_inst_per_aid) - 1; inst_mask;
             inst_mask >>= adev->sdma.num_inst_per_aid, ++i) {
-               sdma_pres = inst_mask & mask;
-               if (sdma_pres == mask || sdma_pres == 0x3 || sdma_pres == 0xc)
+               avail_inst = inst_mask & mask;
+               if (avail_inst == mask || avail_inst == 0x3 ||
+                   avail_inst == 0xc)
                        adev->aid_mask |= (1 << i);
        }
 
-- 
2.25.1

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