[PATCH 2/2] drm/amd/pm: Update uclk/sclk limit report format

[Asad Kamal]

Update max set uclk and sclk reporting format for smu_v_13_0_0

Signed-off-by: Asad Kamal <asad.ka...@amd.com>
---
 .../gpu/drm/amd/pm/swsmu/smu13/aldebaran_ppt.c   | 16 ++++++++++------
 1 file changed, 10 insertions(+), 6 deletions(-)

diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu13/aldebaran_ppt.c 
b/drivers/gpu/drm/amd/pm/swsmu/smu13/aldebaran_ppt.c
index f4b31b86e2a4..6f0d7602d2a8 100644
--- a/drivers/gpu/drm/amd/pm/swsmu/smu13/aldebaran_ppt.c
+++ b/drivers/gpu/drm/amd/pm/swsmu/smu13/aldebaran_ppt.c
@@ -759,8 +759,11 @@ static int aldebaran_emit_clk_levels(struct smu_context 
*smu,
        switch (type) {
 
        case SMU_OD_SCLK:
-               *offset += sysfs_emit_at(buf, *offset, "%s:\n", "GFXCLK");
-               fallthrough;
+               *offset += sysfs_emit_at(buf, *offset, "%s:\n", "OD_SCLK");
+               *offset += sysfs_emit_at(buf, *offset, "0: %uMhz\n1: %uMhz\n",
+                                     pstate_table->gfxclk_pstate.curr.min,
+                                     pstate_table->gfxclk_pstate.curr.max);
+               return 0;
        case SMU_SCLK:
                ret = aldebaran_get_current_clk_freq_by_table(smu, SMU_GFXCLK, 
&cur_value);
                if (ret) {
@@ -788,8 +791,11 @@ static int aldebaran_emit_clk_levels(struct smu_context 
*smu,
                break;
 
        case SMU_OD_MCLK:
-               *offset += sysfs_emit_at(buf, *offset, "%s:\n", "MCLK");
-               fallthrough;
+               *offset += sysfs_emit_at(buf, *offset, "%s:\n", "OD_MCLK");
+               *offset += sysfs_emit_at(buf, *offset, "0: %uMhz\n1: %uMhz\n",
+                                     pstate_table->uclk_pstate.curr.min,
+                                     pstate_table->uclk_pstate.curr.max);
+               return 0;
        case SMU_MCLK:
                ret = aldebaran_get_current_clk_freq_by_table(smu, SMU_UCLK, 
&cur_value);
                if (ret) {
@@ -850,7 +856,6 @@ static int aldebaran_emit_clk_levels(struct smu_context 
*smu,
        }
 
        switch (type) {
-       case SMU_OD_SCLK:
        case SMU_SCLK:
                for (i = 0; i < display_levels; i++) {
                        clock_mhz = freq_values[i];
@@ -863,7 +868,6 @@ static int aldebaran_emit_clk_levels(struct smu_context 
*smu,
                }
                break;
 
-       case SMU_OD_MCLK:
        case SMU_MCLK:
        case SMU_SOCCLK:
        case SMU_FCLK:
-- 
2.42.0