Add new types to distinguish between ACA error type and smu mca type.
e.g.:
the ACA_ERROR_TYPE_DEFERRED is not matched any smu mca valid bank
channel, so add new type 'aca_smu_type' to distinguish aca error type
and smu mca type.
Signed-off-by: Yang Wang <kevinyang.w...@amd.com>
---
drivers/gpu/drm/amd/amdgpu/amdgpu_aca.c | 27 ++++++++++++++-----
drivers/gpu/drm/amd/amdgpu/amdgpu_aca.h | 10 +++++--
.../drm/amd/pm/swsmu/smu13/smu_v13_0_6_ppt.c | 26 +++++++++---------
3 files changed, 41 insertions(+), 22 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_aca.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_aca.c
index 8c18dfb28030..72b7fe5d246a 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_aca.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_aca.c
@@ -86,7 +86,7 @@ static void aca_banks_release(struct aca_banks *banks)
}
}
-static int aca_smu_get_valid_aca_count(struct amdgpu_device *adev, enum
aca_error_type type, u32 *count)
+static int aca_smu_get_valid_aca_count(struct amdgpu_device *adev, enum
aca_smu_type type, u32 *count)
{
struct amdgpu_aca *aca = &adev->aca;
const struct aca_smu_funcs *smu_funcs = aca->smu_funcs;
@@ -127,7 +127,7 @@ static void aca_smu_bank_dump(struct amdgpu_device *adev,
int idx, int total, st
idx + 1, total, aca_regs[i].name,
bank->regs[aca_regs[i].reg_idx]);
}
-static int aca_smu_get_valid_aca_banks(struct amdgpu_device *adev, enum
aca_error_type type,
+static int aca_smu_get_valid_aca_banks(struct amdgpu_device *adev, enum
aca_smu_type type,
int start, int count,
struct aca_banks *banks)
{
@@ -143,13 +143,12 @@ static int aca_smu_get_valid_aca_banks(struct
amdgpu_device *adev, enum aca_erro
return -EOPNOTSUPP;
switch (type) {
- case ACA_ERROR_TYPE_UE:
+ case ACA_SMU_TYPE_UE:
max_count = smu_funcs->max_ue_bank_count;
break;
- case ACA_ERROR_TYPE_CE:
+ case ACA_SMU_TYPE_CE:
max_count = smu_funcs->max_ce_bank_count;
break;
- case ACA_ERROR_TYPE_DEFERRED:
default:
return -EINVAL;
}
@@ -164,6 +163,8 @@ static int aca_smu_get_valid_aca_banks(struct amdgpu_device
*adev, enum aca_erro
if (ret)
return ret;
+ bank.type = type;
+
aca_smu_bank_dump(adev, i, count, &bank);
ret = aca_banks_add_bank(banks, &bank);
@@ -383,6 +384,7 @@ static int aca_banks_update(struct amdgpu_device *adev,
enum aca_error_type type
{
struct amdgpu_aca *aca = &adev->aca;
struct aca_banks banks;
+ enum aca_smu_type smu_type;
u32 count = 0;
int ret;
@@ -392,8 +394,19 @@ static int aca_banks_update(struct amdgpu_device *adev,
enum aca_error_type type
/* NOTE: pmfw is only support UE and CE */
if (type == ACA_ERROR_TYPE_DEFERRED)
type = ACA_ERROR_TYPE_CE;
+ switch (type) {
+ case ACA_ERROR_TYPE_UE:
+ smu_type = ACA_SMU_TYPE_UE;
+ break;
+ case ACA_ERROR_TYPE_CE:
+ case ACA_ERROR_TYPE_DEFERRED:
+ smu_type = ACA_SMU_TYPE_CE;
+ break;
+ default:
+ return -EINVAL;
+ }
- ret = aca_smu_get_valid_aca_count(adev, type, &count);
+ ret = aca_smu_get_valid_aca_count(adev, smu_type, &count);
if (ret)
return ret;
@@ -402,7 +415,7 @@ static int aca_banks_update(struct amdgpu_device *adev,
enum aca_error_type type
aca_banks_init(&banks);
- ret = aca_smu_get_valid_aca_banks(adev, type, 0, count, &banks);
+ ret = aca_smu_get_valid_aca_banks(adev, smu_type, 0, count, &banks);
if (ret)
goto err_release_banks;
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_aca.h
b/drivers/gpu/drm/amd/amdgpu/amdgpu_aca.h
index e650fed2e806..0fc9e266e269 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_aca.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_aca.h
@@ -99,7 +99,13 @@ enum aca_error_type {
ACA_ERROR_TYPE_COUNT
};
+enum aca_smu_type {
+ ACA_SMU_TYPE_UE,
+ ACA_SMU_TYPE_CE,
+};
+
struct aca_bank {
+ enum aca_smu_type type;
u64 regs[ACA_MAX_REGS_COUNT];
};
@@ -167,8 +173,8 @@ struct aca_smu_funcs {
int max_ue_bank_count;
int max_ce_bank_count;
int (*set_debug_mode)(struct amdgpu_device *adev, bool enable);
- int (*get_valid_aca_count)(struct amdgpu_device *adev, enum
aca_error_type type, u32 *count);
- int (*get_valid_aca_bank)(struct amdgpu_device *adev, enum
aca_error_type type, int idx, struct aca_bank *bank);
+ int (*get_valid_aca_count)(struct amdgpu_device *adev, enum
aca_smu_type type, u32 *count);
+ int (*get_valid_aca_bank)(struct amdgpu_device *adev, enum aca_smu_type
type, int idx, struct aca_bank *bank);
};
struct amdgpu_aca {
diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_6_ppt.c
b/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_6_ppt.c
index 29c102fe650d..f101c58acc51 100644
--- a/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_6_ppt.c
+++ b/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_6_ppt.c
@@ -2974,7 +2974,7 @@ static int aca_smu_set_debug_mode(struct amdgpu_device
*adev, bool enable)
return smu_v13_0_6_mca_set_debug_mode(smu, enable);
}
-static int smu_v13_0_6_get_valid_aca_count(struct smu_context *smu, enum
aca_error_type type, u32 *count)
+static int smu_v13_0_6_get_valid_aca_count(struct smu_context *smu, enum
aca_smu_type type, u32 *count)
{
uint32_t msg;
int ret;
@@ -2983,10 +2983,10 @@ static int smu_v13_0_6_get_valid_aca_count(struct
smu_context *smu, enum aca_err
return -EINVAL;
switch (type) {
- case ACA_ERROR_TYPE_UE:
+ case ACA_SMU_TYPE_UE:
msg = SMU_MSG_QueryValidMcaCount;
break;
- case ACA_ERROR_TYPE_CE:
+ case ACA_SMU_TYPE_CE:
msg = SMU_MSG_QueryValidMcaCeCount;
break;
default:
@@ -3003,14 +3003,14 @@ static int smu_v13_0_6_get_valid_aca_count(struct
smu_context *smu, enum aca_err
}
static int aca_smu_get_valid_aca_count(struct amdgpu_device *adev,
- enum aca_error_type type, u32 *count)
+ enum aca_smu_type type, u32 *count)
{
struct smu_context *smu = adev->powerplay.pp_handle;
int ret;
switch (type) {
- case ACA_ERROR_TYPE_UE:
- case ACA_ERROR_TYPE_CE:
+ case ACA_SMU_TYPE_UE:
+ case ACA_SMU_TYPE_CE:
ret = smu_v13_0_6_get_valid_aca_count(smu, type, count);
break;
default:
@@ -3021,16 +3021,16 @@ static int aca_smu_get_valid_aca_count(struct
amdgpu_device *adev,
return ret;
}
-static int __smu_v13_0_6_aca_bank_dump(struct smu_context *smu, enum
aca_error_type type,
+static int __smu_v13_0_6_aca_bank_dump(struct smu_context *smu, enum
aca_smu_type type,
int idx, int offset, u32 *val)
{
uint32_t msg, param;
switch (type) {
- case ACA_ERROR_TYPE_UE:
+ case ACA_SMU_TYPE_UE:
msg = SMU_MSG_McaBankDumpDW;
break;
- case ACA_ERROR_TYPE_CE:
+ case ACA_SMU_TYPE_CE:
msg = SMU_MSG_McaBankCeDumpDW;
break;
default:
@@ -3042,7 +3042,7 @@ static int __smu_v13_0_6_aca_bank_dump(struct smu_context
*smu, enum aca_error_t
return smu_cmn_send_smc_msg_with_param(smu, msg, param, (uint32_t
*)val);
}
-static int smu_v13_0_6_aca_bank_dump(struct smu_context *smu, enum
aca_error_type type,
+static int smu_v13_0_6_aca_bank_dump(struct smu_context *smu, enum
aca_smu_type type,
int idx, int offset, u32 *val, int count)
{
int ret, i;
@@ -3059,7 +3059,7 @@ static int smu_v13_0_6_aca_bank_dump(struct smu_context
*smu, enum aca_error_typ
return 0;
}
-static int aca_bank_read_reg(struct amdgpu_device *adev, enum aca_error_type
type,
+static int aca_bank_read_reg(struct amdgpu_device *adev, enum aca_smu_type
type,
int idx, int reg_idx, u64 *val)
{
struct smu_context *smu = adev->powerplay.pp_handle;
@@ -3076,13 +3076,13 @@ static int aca_bank_read_reg(struct amdgpu_device
*adev, enum aca_error_type typ
*val = (u64)data[1] << 32 | data[0];
dev_dbg(adev->dev, "mca read bank reg: type:%s, index: %d, reg_idx: %d,
val: 0x%016llx\n",
- type == ACA_ERROR_TYPE_UE ? "UE" : "CE", idx, reg_idx, *val);
+ type == ACA_SMU_TYPE_UE ? "UE" : "CE", idx, reg_idx, *val);
return 0;
}
static int aca_smu_get_valid_aca_bank(struct amdgpu_device *adev,
- enum aca_error_type type, int idx, struct
aca_bank *bank)
+ enum aca_smu_type type, int idx, struct
aca_bank *bank)
{
int i, ret, count;
--
2.34.1
