On gfx9 hardware the value is not wrapped and is a 64-bit value.  So
we reduce it modulo the ring size.

Signed-off-by: Tom St Denis <tom.stde...@amd.com>
---
 drivers/gpu/drm/amd/amdgpu/amdgpu_ring.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.c 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.c
index ac0ce3f27f87..b6d2c0b2a501 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.c
@@ -320,8 +320,8 @@ static ssize_t amdgpu_debugfs_ring_read(struct file *f, 
char __user *buf,
 
        if (*pos < 12) {
                early[0] = amdgpu_ring_get_rptr(ring);
-               early[1] = amdgpu_ring_get_wptr(ring);
-               early[2] = ring->wptr;
+               early[1] = amdgpu_ring_get_wptr(ring) & ((ring->ring_size >> 2) 
- 1);
+               early[2] = ring->wptr & ((ring->ring_size >> 2) - 1);
                for (i = *pos / 4; i < 3 && size; i++) {
                        r = put_user(early[i], (uint32_t *)buf);
                        if (r)
-- 
2.12.0

_______________________________________________
amd-gfx mailing list
amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx

Reply via email to