Harkening back to my prior discussion of minimizing cyclic NOR logic as an
approach to algorithmic information's reformulation, hence the "is" half of
AIXI's unification of "is" (AIT) with "ought" (Sequential Decision Theory):

Lossless compression is time-reversed decompression, so minimal reversible
sequential logic (MRSL?) would seem interesting.

I've brought this up before, particularly with regard to the "bit bucket"
connections of the reversible logic gates, raising the issue of how one
correctly penalizes (measures the "loss") of such models of the data.  I
suppose one can imagine a restriction on the topology such that no dangling
connections are allowed except at the 2 ends, so as to collapse that
measure into the already-required measure of the state initialization.  But
this seems rather an unprincipled kludge.

While it is true that, occasionally, a bit string will have a minimum NOR
circuit -- or reversible gate circuit -- such that nothing happens on any
input (it's all implied by the initialization state and connectivity),
usually, it will be lower complexity to have a clocked input on the
compressed end, with a "tape" of sorts containing the residual entropy,
since encoding that tape as a generating circuit would require more bits to
describe the total system.

So that residual entropy must correspond in a nontrivial way to one part of
the so-called "two part message" (assuming we restrict ourselves to UTM
languages):  The message as opposed to the model part.

If we allow reversible gates, and don't simply kludge our way out of the
question of how to measure the "bit bucket" connections by requiring all
but one of them to be closed within the circuit, is there any way of
thinking about this kind of MRSL that sheds light on the nature of the
minimal NOR network outputting the same target bit stream?

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